advanced configuration and power interface advanced power management back side bus bit-level parallelism cpu cache central processing unit clock gating complex instruction set computer computer architecture computer engineering crusoe dec alpha data parallelism dataflow architecture decoupled architecture digital signal processor dynamic frequency scaling dynamic voltage scaling explicit data graph execution explicitly parallel instruction computing fetch fujitsu hal harvard architecture hyper-threading ibm instruction cycle instruction level parallelism instruction pipeline instruction set intel atom mimd misd microcontroller microprocessor minimal instruction set computer motorola multiplexer one instruction set computer operand parallel computing pentium pro powerpc power management processor register reduced instruction set computer register file register renaming replay system reservation stations simd sisd sparc scoreboarding simultaneous multithreading speculative execution super-threading superscalar system-on-a-chip task parallelism tomasulo algorithm vector processor very long instruction word von neumann architecture yale patt zero instruction set computer